Senior Engineer, FPGA
Job Description
<div class="content-intro"><p><span style="font-size: 12pt;"><strong>Company Overview</strong></span></p> <p><strong>Ambiq</strong> is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.</p> <p>Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.</p> <p>Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.</p> <p>We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.</p> <p>At Ambiq, we live by five values: <strong>Innovate. Collaborate. Focus. Learn. Achieve.</strong></p> <p>If that's you, join us — the intelligence everywhere revolution starts here.</p> <p> </p></div><p><span data-contrast="none">As the Senior Engineer, FPGA</span><strong><span data-contrast="none"> </span></strong><span data-contrast="none">at </span><span data-contrast="none">Ambiq, you will drive the </span><span data-contrast="none">development and </span><span data-contrast="none">rendering of FPGA images in support of our pre-silicon prototyping environments. </span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></p> <p><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></p> <p><span data-contrast="none">In this role, you will work with our SoC design, software development, design verification, and system test teams as our primary internal customers for the FPGA images. </span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></p> <p><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></p> <p><span data-contrast="none">The successful candidate will have experience in RTL design, verification, and FPGA/Prototyping platform creation to support Design Verification, Validation, Software Development and System Test at the pre-silicon phase. </span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></p> <p><span data-contrast="none">The person in this role must be </span><span data-contrast="none">comfortable working with RTL to implement specialized changes to the SoC database for the FPGA development </span><span data-contrast="auto">flow. This role will require defining and implementing internal and external FPGA timing constraints to enable repeated delivery of design iterations to the software and validation teams. The candidate will be required to debug RTL designs using FPGA tools, external logic analyzers, and protocol analyzers.</span><span data-ccp-props="{"201341983":0,"335559740":257}"> </span></p> <p><strong><span data-contrast="auto">Responsibilities</span></strong><span data-ccp-props="{"134233117":true,"134233118":true,"201341983":0,"335559740":240}"> </s