Hardware Design Engineering, Director - OEM, Silicon Validation Platforms & Rack-Scale Design - Taiwan
Job Description
<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p> </p> <p data-local-id="ff02c8680261" data-prosemirror-content-type="node" data-prosemirror-node-name="paragraph" data-prosemirror-node-block="true" data-pm-slice="1 3 []">We are hiring a <strong data-prosemirror-content-type="mark" data-prosemirror-mark-name="strong">Director of Hardware Design Engineering — OEM, Silicon Validation Platforms & Rack-Scale Design</strong> to establish and lead Astera Labs' Taiwan hardware engineering center. This role serves as the primary hardware engineering hub for OEM customer engagement across Asia, while simultaneously owning the design and development of Silicon Validation Platforms (SVB/EVB) and rack-scale products (AI chassis, switch trays, CEM cards).</p> <p data-local-id="d22607f66bf4" data-prosemirror-content-type="node" data-prosemirror-node-name="paragraph" data-prosemirror-node-block="true">This is a high-impact leadership role that combines three critical functions:</p> <ol class="ak-ol" data-local-id="7ca0f63f-e051-4023-872d-d6049db1f210" data-prosemirror-content-type="node" data-prosemirror-node-name="orderedList" data-prosemirror-node-block="true"> <li data-local-id="e1ddeb3c-0a6e-4e8f-9723-430d417eb822" data-prosemirror-content-type="node" data-prosemirror-node-name="listItem" data-prosemirror-node-block="true"> <p data-local-id="080bb45cc698" data-prosemirror-content-type="node" data-prosemirror-node-name="paragraph" data-prosemirror-node-block="true"><strong data-prosemirror-content-type="mark" data-prosemirror-mark-name="strong">OEM Design Enablement & Customer Support</strong> — Serving as the front-line hardware engineering partner for OEM customers in Asia (hyperscale cloud, server/switch OEMs, cable/module manufacturers) who are integrating Astera Labs silicon into their own products</p> </li> <li data-local-id="29100fa1-0983-4882-ad74-f227dde90495" data-prosemirror-content-type="node" data-prosemirror-node-name="listItem" data-prosemirror-node-block="true"> <p data-local-id="2a59166bfb7c" data-prosemirror-content-type="node" data-prosemirror-node-name="paragraph" data-prosemirror-node-block="true"><strong data-prosemirror-content-type="mark" data-prosemirror-mark-name="strong">Silicon Validation Platform Design (SVB/EVB)</strong> — Designing and delivering the evaluation boards and system validation platforms that enable silicon bring-up, characterization, customer evaluation, and reference design seeding</p> </li> <li data-local-id="94764436-e242-480f-8bdf-9bfef05cb8d2" data-prosemirror-content-type="node" data-prosemirror-node-name="listItem" data-prosemirror-node-block="true"> <p data