<div class="content-intro">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</div>Principal Digital Design Engineer: Overview Join our team as Principal Digital Design Engineer to architect and implement next-generation digital designs for high-performance connectivity solutions. You'll own complex blocks from micro-architecture through silicon bring-up, driving RTL implementation and collaborating with verification, PD and DFT teams to deliver high-performance products in a fast-paced, collaborative environment. Key Responsibilities <ul> <li>Develop and implement complex digital blocks and subsystems by defining micro-architecture and driving digital design.</li> <li>Collaborate with verification teams to develop test plans, achieve coverage closure, and debug complex issues.</li> <li>Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features for optimal design performance.</li> <li>Work closely with post-silicon teams to facilitate silicon bring-up and debug.</li> <li>Mentor junior engineers to develop their technical skills and expertise.</li> <li>Actively contribute to the development and improvement of silicon development processes.</li> <li>Drive designs to production, ensuring accountability for quality, schedule, and overall design success.</li> </ul> Required Qualifications: Education & Experience: <ul> <li>Bachelor’s degree in electrical engineering or equivalent.</li> <li>8+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets</li> </ul> Digital Design Expertise: <ul> <li>Architecture definition and micro-architecture development</li> <li>RTL coding, functional simulation, and synthesis</li> <li>Timing closure and gate-level simulation (GLS)</li> <li>Design for test (DFT) implementation</li> <li>Production experience with advanced CMOS nodes (≤7nm)</li> </ul> Protocols & Integration: <ul> <li>Deep expertise in at least one high-speed protocol—PCIe, Ethernet, InfiniBand, DDR, or similar</li> <li>Third-party IP integration and verification.</li> <li>Block-level design ownership from architecture through GDS</li> </ul> <

Principal Digital Design Engineer

Job Description