Senior Principal Engineering Program Manager

<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p></p> <p><strong>Role Overview</strong></p> <p></p> <p></p> <p>Astera Labs is looking for a <strong>Senior Principal Engineering Program Manager</strong> to lead end-to-end execution of advanced-node ASIC products from concept through production. This is a high-visibility role with direct accountability for delivering revenue-critical silicon on time, on spec, and at scale.</p> <p></p> <p></p> <p><strong>Key Responsibilities</strong></p> <p></p> <p></p> <ul> <li class="text-start "> <p><strong>Program Ownership & Execution</strong></p> <ul> <li class="text-start ">Own full ASIC lifecycle execution: architecture, RTL, verification, physical design, tapeout, validation, customer sampling, qualification, and RTM</li> <li class="text-start ">Serve as the single point of ownership for assigned ASIC programs</li> <li class="text-start ">Drive program planning, schedules, budgets, resources, and risk management</li> </ul> </li> <li class="text-start "> <p><strong>Cross-Functional Leadership & Issue Resolution</strong></p> <ul> <li class="text-start ">Lead cross-functional teams across design, validation, product, test, firmware, software, and operations</li> <li class="text-start ">Resolve complex pre-silicon and post-silicon issues through strong technical judgment</li> </ul> </li> <li class="text-start "> <p><strong>Stakeholder Management & Alignment</strong></p> <ul> <li class="text-start ">Manage scope, schedule, and cost trade-offs and communicate clearly with executives and stakeholders</li> <li class="text-start ">Champion program execution while aligning engineering delivery with business and customer goals</li> </ul> </li> </ul> <p></p> <p></p> <p><strong>Basic Qualifications</strong></p> <p></p> <p></p> <ul> <li class="text-start ">BS or MS in Electrical, Electronics, or Computer Engineering</li> <li class="text-start ">10+ years of ASIC product development experience in a semiconductor environment</li> <li class="text-start ">Strong understanding of ASIC development flows, with hands-on experience in RTL, DSP, or Physical Design</li> <li class="text-start ">Experience delivering ASICs in advanced nodes (<10nm)</li> <li class="text-start ">Proven ability to